@CHIP-RTOS - Hardware API

Hardware API

API Functions

The hardware API uses interrupts 0xA2 (PFE functions) and 0xA1 (HAL functions) with a service number in the high order byte of the AX register (AH).   The implemented hardware services are listed below.

For some useful comments see also under Programming notes

Topics

Hardware API Layer Model

PFE Interrupt 0xA2 Services

HAL Interrupt 0xA1 Services

SC1x:

Initialize data bus I/O mask and ALE usage.

SC1x3:

Initialize data bus I/O mask

Parameters

AH

Must be 0x80.

SC1x Parameters

AL

0: Disable ALE,   1: Enable ALE

DX

Mask

Bit 0 = 0: Data bus bit 0 is input, 1: is output
Bit 1 = 0: Data bus bit 1 is input, 1: is output
:
:
Bit 7 = 0: Data bus bit 7 is input, 1: is output
Bit 8..15 not used (for future extensions)

SC1x3 Parameters

AL

Don't care

DX

Mask

Bit 0 = 0: Data bus bit 0 is input, 1: is output
Bit 1 = 0: Data bus bit 1 is input, 1: is output
:
:
Bit 15 = 0: Data bus bit 15 is input, 1: is output

Return Value

none

Comments

The I/O mask defines which data bits on the bus are inputs and which are outputs.
The DX mask bit for bi-directional data bus lines (read/write) should be set to '1'.

SC1x Comments

Used pins:
ALE, AD[0..7], RD#, WR#

Excluded pins:
If ALE is used, then PCS0# is not available.

SC1x3 Comments

Used pins:
A[0..22], D[0..15], RD#, WR#

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	n/a

SC1x:

The IPC@CHIP®:s SC12, SC11 and SC13 have three non-multiplexed address bit outputs, A0 through A2.   The enabling of these pins is done here.

SC1x3:

The IPC@CHIP®s SC123/SC143 have one non-multiplexed address bit output A23, which is also a PIO pin.   The enabling of A23 as an address line is done here.

Parameters

AH

Must be 0x81.

SC1x Parameters

DX

Mask
    Bit 0 = 1 Enable A0
    Bit 1 = 1 Enable A1
    Bit 2 = 1 Enable A2
    Bit 3..15 not used

SC1x3 Parameters

DX

Mask
    Bit 0..14 not used
    Bit 15 = 1 Enable A23

Return Value

none

SC1x Comments

Used pins:
A[0..2], AD[0..7], RD#, WR#

Excluded pins:
If A0 is enabled then PCS1#, TMRIN0, PIO4 are not available
If A1 is enabled then PCS[5..6]#, TMRIN1, TMROUT1, PIO3 are not available
If A2 is enabled then PCS[5..6]#, PIO2 are not available.

SC1x3 Comments

Used pins:
A23

Excluded pins:
If A23 is enabled then PIO26 is not available

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	n/a

Enable used programmable I/O pins.   Define which pins are inputs and which are outputs.

Parameters

AH

Must be 0x82.

SC1x Parameters

AL

Mode

0 = Only read PIO state
1 = Input without pullup/pulldown
2 = Input with pullup (not PIO13)
3 = Input with pulldown (only for PIO3 and PIO13)
4 = Output init value = High
5 = Output init value = Low

DX

PIO pin mask

Bit 0 = 1 Enable PIO0
Bit 1 = 1 Enable PIO1
:
Bit 13 = 1 Enable PIO13
Bit 14..15 not used (for future extensions)

SC1x3 Parameters

AL

Mode

PIOs 0-15:
0 = Only read PIO state
1,2 = Input with pullup
4 = Output init value = High
5 = Output init value = Low
PIOs 16-24, 26-31:
10 = Only read PIO state
11,12 = Input with pullup
14 = Output init value = High
15 = Output init value = Low

DX

PIO pin mask

Bit 0 = 1 Enable PIO0 / PIO16 (see mode)
Bit 1 = 1 Enable PIO1 / PIO17 (see mode)
:
Bit 15 = 1 Enable PIO15 / PIO31 (see mode)

SC2x Parameters

AL

Mode

PIOs 0-2, 9-13:
0 = Only read PIO state
1,2,3 = Input with pullup/down (PIO1/PIO2=pulldown, all other=pullup)
4 = Output init value = High
5 = Output init value = Low
PIOs 18-23, 27-28, 31:
10 = Only read PIO state
11,12,13 = Input with pullup
14 = Output init value = High
15 = Output init value = Low

DX

PIO pin

Bit 0 = 1 Enable PIO0 (see mode)
Bit 1 = 1 Enable PIO1 (see mode)
Bit 2 = 1 Enable PIO2 / PIO18 (see mode)
Bit 3 = 1 Enable PIO19 (see mode)
Bit 4 = 1 Enable PIO20 (see mode)
Bit 5 = 1 Enable PIO21 (see mode)
Bit 6 = 1 Enable PIO22 (see mode)
Bit 7 = 1 Enable PIO23 (see mode)
Bit 9 = 1 Enable PIO9 (see mode)
Bit 10 = 1 Enable PIO10 (see mode)
Bit 11 = 1 Enable PIO11 / PIO27 (see mode)
Bit 12 = 1 Enable PIO12 / PIO28 (see mode)
Bit 13 = 1 Enable PIO13 (see mode)
Bit 15 = 1 Enable PIO31 (see mode)

SC1x Return Value

AX = wPIO

Bit 0 = 1: PIO0 is PIO
Bit 1 = 1: PIO1 is PIO
:
Bit 13 = 1: PIO13 is PIO
Bit 14..15 not used (for future extensions)

DX = wINPUTS (all pins, including non-PIO pins)

Bit 0 = 1: PIO0 is input
Bit 1 = 1: PIO1 is input
:
Bit 13 = 1: PIO13 is input
Bit 14..15 not used (for future extensions)

CX = wOUTPUTS (all pins, including non-PIO pins)

Bit 0 = 1: PIO0 is output
Bit 1 = 1: PIO1 is output
:
Bit 13 = 1: PIO13 is output
Bit 14..15 not used (for future extensions)

AX = DX = CX = 0, Error: Wrong arguments

SC1x3 Return Value

AX = wPIO

Bit 0 = 1: PIO0 / PIO16 is PIO
Bit 1 = 1: PIO1 / PIO17 is PIO
:
Bit 15 = 1: PIO15 / PIO31 is PIO

DX = wINPUTS (all pins, including non-PIO pins)

Bit 0 = 1: PIO0 / PIO16 is input
Bit 1 = 1: PIO1 / PIO17 is input
:
Bit 15 = 1: PIO15 / PIO31 is input

CX = wOUTPUTS (all pins, including non-PIO pins)

Bit 0 = 1: PIO0 / PIO16 is output
Bit 1 = 1: PIO1 / PIO17 is output
:
Bit 15 = 1: PIO15 / PIO31 is output

AX = DX = CX = 0, Error: Wrong arguments

SC2x Return Value

AX = wPIO

Bit 0 = 1: PIO0 is PIO
Bit 1 = 1: PIO1 is PIO
Bit 2 = 1: PIO2 / PIO18 is PIO
Bit 3 = 1: PIO19 is PIO
Bit 4 = 1: PIO20 is PIO
Bit 5 = 1: PIO21 is PIO
Bit 6 = 1: PIO22 is PIO
Bit 7 = 1: PIO23 is PIO
Bit 9 = 1: PIO9 is PIO
Bit 10 = 1: PIO10 is PIO
Bit 11 = 1: PIO11 / PIO27 is PIO
Bit 12 = 1: PIO12 / PIO28 is PIO
Bit 13 = 1: PIO13 is PIO
Bit 15 = 1: PIO31 is PIO

DX = wINPUTS (all pins, including non-PIO pins)

Bit 0 = 1: PIO0 is input
Bit 1 = 1: PIO1 is input
Bit 2 = 1: PIO2 / PIO18 is input
Bit 3 = 1: PIO19 is input
Bit 4 = 1: PIO20 is input
Bit 5 = 1: PIO21 is input
Bit 6 = 1: PIO22 is input
Bit 7 = 1: PIO23 is input
Bit 9 = 1: PIO9 is input
Bit 10 = 1: PIO10 is input
Bit 11 = 1: PIO11 / PIO27 is input
Bit 12 = 1: PIO12 / PIO28 is input
Bit 13 = 1: PIO13 is input

CX = wOUTPUTS (all pins, including non-PIO pins)

Bit 0 = 1: PIO0 is output
Bit 1 = 1: PIO1 is output
Bit 2 = 1: PIO2 / PIO18 is output
Bit 3 = 1: PIO19 is output
Bit 4 = 1: PIO20 is output
Bit 5 = 1: PIO21 is output
Bit 6 = 1: PIO22 is output
Bit 7 = 1: PIO23 is output
Bit 9 = 1: PIO9 is output
Bit 10 = 1: PIO10 is output
Bit 11 = 1: PIO11 / PIO27 is output
Bit 12 = 1: PIO12 / PIO28 is output
Bit 13 = 1: PIO13 is output

AX = DX = CX = 0, Error: Wrong arguments

Comments

This function can be called several times for definition of different PIO pins.   With repeated selection of the same pin, the definition made last is valid.   The selection of a PIO pin can be cancelled by calling the appropriate PFE function that causes the respective PIO pin to be used for another purpose (e.g. function 0x83).

used pins:
    PIO[0..x]
excluded pins:
    All other functionality on the selected PIO pin.

Related Topics

Read Specific I/O Pin

Write to Specific I/O Pin

Read Programmable I/O Pins

Write Programmable I/O Pins

Initialize the I2C Bus

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

SC1x:

Enable chip selects PCS[0..3]#, PCS[5..6]#.

SC1x3:

Enable chip selects PCS[4..7]#.

Parameters

AH

Must be 0x83.

SC1x Parameters

DX

Mask

Bit 0 = 1 Enable PCS0#, active when I/O address between 000h..0FFh
Bit 1 = 1 Enable PCS1#, active when I/O address between 100h..1FFh
Bit 2 = 1 Enable PCS2#, active when I/O address between 200h..2FFh
Bit 3 = 1 Enable PCS3#, active when I/O address between 300h..3FFh
Bit 4 = don't care
Bit 5 = 1 Enable PCS5#, active when I/O address between 500h..5FFh
Bit 6 = 1 Enable PCS6#, active when I/O address between 600h..6FFh
Bit 7..15 = don't care

SC1x3 Parameters

DX

Mask

Bit 0 = don't care (no PIO), PCS0# is active when I/O address between 000h..1FFh
Bit 1 = don't care (no PIO), PCS1# is active when I/O address between 200h..3FFh
Bit 2 = don't care (no PIO), PCS2# is active when I/O address between 400h..5FFh
Bit 3 = don't care (no PIO), PCS3# is active when I/O address between 600h..7FFh
Bit 4 = 1 Enable PCS4#, active when I/O address between 800h..9FFh
Bit 5 = 1 Enable PCS5#, active when I/O address between A00h..BFFh
Bit 6 = 1 Enable PCS6#, active when I/O address between C00h..DFFh
Bit 7 = 1 Enable PCS7#, active when I/O address between E00h..FFFh
Bit 8..15 = don't care

Return Value

none

SC1x Comments

Used pins:
PCS[0..3]#, PCS[5..6]#

Excluded pins:
If PCS0#: ALE (multiplexed address / data bus)
If PCS1#: A0, PIO4, TMRIN0
If PCS2#: PIO6, INT2, INTA#, PWD, hw flow control serial port 1, cascaded interrupt controller
If PCS3#: PIO5, INT4, hw flow control serial port 1
If PCS5#: A[1..2], PIO3, TMROUT1, TMRIN1
If PCS6#: A[1..2], PIO2

SC1x3 Comments

Used pins:
PCS[0..7]#

Excluded pins:
If PCS4#: PIO4
If PCS5#: PIO3
If PCS6#: PIO2
If PCS7#: PIO5

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	n/a

SC1x:

Enable external interrupt requests INT[0], INT[2..6].

SC1x3/SC2x:

Enable external interrupt requests INT[1], INT[3], INT[5], PFI.

Parameters

AH

Must be 0x84.

SC1x Parameters

DX

Mask

Bit 0 = 1 Enable INT0
Bit 1 = don't care
Bit 2 = 1 Enable INT2
Bit 3 = 1 Enable INT3
Bit 4 = 1 Enable INT4
Bit 5 = 1 Enable INT5
Bit 6 = 1 Enable INT6
Bit 7..15 = don't care

SC1x3/SC2x Parameters

DX

Mask

Bit 0 = don't care
Bit 1 = 1 Enable INT1
Bit 2 = don't care
Bit 3 = 1 Enable INT3
Bit 4 = don't care
Bit 5 = 1 Enable INT5
Bit 6..14 = don't care
Bit15 = 1 Enable PFI (powerfail interrupt)

Return Value

none

SC1x Comments

Used pins:

INT0, INT[2..6]

Excluded pins:

If INT0: PIO13, TMROUT0, cascaded interrupt controller
If INT2: PIO6, PCS2#, INTA#, PWD, hw flow control serial port 1
If INT3: PIO12, serial port 1
If INT4: PIO5, PCS3#, hw flow control serial port 1
If INT5: PIO1, DRQ0, default I²C-Bus pins
If INT6: PIO0, DRQ1, default I²C-Bus pins

SC1x3 Comments

Used pins:

INT1, INT3, INT5, PFI

Excluded pins:

If INT5: PIO30
If PFI: PIO9

SC2x Comments

Used pins:

INT1, INT3, INT5, PFI

Excluded pins:

If INT5: PIO0 / TMRIN1
If INT3: PIO1 / TMROUT1
If INT1: PIO2
If PFI: PIO9

Related Topics

Set Edge/Level Interrupt Mode

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Enable external timer inputs (TMRIN0, TMRIN1) or timer outputs (TMROUT0, TMROUT1).

Parameters

AH

Must be 0x85.

DX

Mode

Bit 0..1  = 10 Enable TMRIN0
          = 11 Enable TMROUT0
Bit 2..3  = 10 Enable TMRIN1
          = 11 Enable TMROUT1
Bit 4..15 = don't care

Return Value

none

Comments

If on a given timer the external input is selected, then that timer's external output is not available and vice-versa.

Used pins:

TMRIN[0..1], TMROUT[0..1]

SC1x Comments

Excluded pins:

If TMRIN0:   A0, PCS1#, PIO4, TMROUT0
If TMRIN1:   A[1..2], PCS5#, TMROUT1
If TMROUT0:   PIO13, INT0, cascaded interrupt controller, TMRIN0
If TMROUT1:   A[1..2], PCS5#, TMRIN1, PIO3

SC1x3 Comments

Excluded pins:

If TMRIN0:   PIO11
If TMRIN1:   PIO0
If TMROUT0:   PIO10
If TMROUT1:   PIO1

SC2x Comments

Excluded pins:

If TMRIN0:   PIO11
If TMRIN1:   PIO0 / INT5
If TMROUT0:   PIO10
If TMROUT1:   PIO1 / INT3

Related Topics

HAL Initialize Timer Settings

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

SC1x:

Set edge/level interrupt mode for INT0, INT2, INT3, INT4.

SC1x3/SC2x:

Set edge/level interrupt mode for INT1, INT3, INT5.

Parameters

AH

Must be 0x86.

AL

1 = level-sensitive interrupt
0 = edge-triggered interrupt

SC1x Parameters

DX

Mask, bits set to designate interrupts affected:

Bit 0 = INT0
Bit 1 = don't care
Bit 2 = INT2
Bit 3 = INT3
Bit 4 = INT4
Bit 5..15 = don't care

SC1x3/SC2x Parameters

DX

Mask, bits set to designate interrupts affected:

Bit 0 = don't care
Bit 1 = INT1
Bit 2 = don't care
Bit 3 = INT3
Bit 4 = don't care
Bit 5 = INT5#
Bit 6..15 = don't care

Return Value

none

SC1x Comments

Default for all interrupts is edge-triggered mode.   In each case (edge or level) the interrupt pins must remain high until they are acknowledged.

Level-sensitive mode for INT5 / INT6 is not supported.  The INT5 / INT6 interrupts operate only in edge-triggered mode.

In level-sensitive mode all interrupt lines are active high.
In edge-triggered mode all interrupt lines act on the low-to-high transition.

SC1x3/SC2x Comments

Default for INT3 interrupt is level-triggered mode.   Default for INT1 and INT5# interrupts is edge-triggered mode.   In each case (edge or level) the interrupt pins must remain active until they are acknowledged.

Edge-sensitive mode for INT3 is not allowed if the USB controller is used, because the INT3 interrupt is shared with the USB interrupt.

In level-sensitive mode all interrupt lines except INT5# are active high. INT5# is active low.
In edge-triggered mode all interrupt lines except INT5# act on the low-to-high transition. INT5# acts on the high-to-low transition.

Related Topics

Enable External Interrupt Requests

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Enable Pulse Width Demodulation (PWD)

Parameters

AH

Must be 0x87.

Return Value

none

Comments

In PWD mode, TMRIN0, TMRIN1, INT2 and INT4 are configured internal to the
chip to support the detection of rising (INT2) and falling (INT4) edges on the PWD
input pin and to enable either timer0 when the signal is high or timer1 when
the signal is low.   The INT4, TMRIN0 and TMRIN1 pins are not used in PWD mode
and so are available for use as PIO's.

The ISR for the INT2 and the INT4 interrupts should examine the current count of
the associated timer, timer1 for INT2 and timer0 for INT4, in order to determine
the pulse width.   The ISR should then reset the timer count in preparation for the
next pulse.

Overflow conditions, where the pulse width is greater than the maximum count of the
timer, can be detected by monitoring the MaxCount bit in the associated timer or by
setting the timer to generated interrupt requests.

used pins:
    PWD
excluded pins:
    TMRIN0, TMRIN1, TMROUT0, TMROUT1, INT4, INT2
    PCS2#, INTA#, PIO6, hw flow control serial port 1

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	n/a	n/a

Enables DRQ pin to start DMA transfer

Parameters

AH

Must be 0x88.

SC1x Parameters

AL

DRQ channel:
0 = DRQ0
1 = DRQ1

SC1x3 Parameters

AL

DRQ channel:
0 = DRQ0
1 = DRQ1
2 = DRQ2
3 = DRQ3

Return Value

AX = 0 no error
AX = -1 invalid DRQ channel
AX = -2 DMA channel is used for serial interface

Comments

The DMA channel is maybe in use by the serial ports. You must check the current DMA configuration.

SC1x Comments

Used pins:

DRQ[0..1]

Excluded pins:

If DRQ0: PIO1, INT5, default I²C-Bus pins
If DRQ1: PIO0, INT6, default I²C-Bus pins

SC1x3 Comments

Used pins:

DRQ[0..3]

Excluded pins:

If DRQ0: PIO12
If DRQ1: PIO29
If DRQ2: PIO7
If DRQ3: PIO8

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.02	V1.00	V1.00	V0.90	n/a

Enable INT0 / INTA cascade mode

Parameters

AH

Must be 0x89.

Return Value

none

Comments

To install a service interrupt routine in cascade mode, the
HAL function 0x84 "Install Interrupt Service Routine" can not be used, because
the cascaded interrupt controller supply the interrupt type over the bus.
Install a normal interrupt service routine (ISR) using the setvect function.
At the end of your ISR, issue an EOI to both the cascaded controller and to
the internal interrupt controller (INT0).

Used pins:

INT0, INTA#

Excluded pins:
PIO13, TMROUT0, INT0 in normal mode, PIO6, PCS2#, PWD, hw flow control serial port 1

Related Topics

HAL 0x8E Give EOI

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.02	V1.00	V1.00	n/a	n/a

Set wait states for programmable chip selects PCS0#-PCS3#

Parameters

AH

Must be 0x8A.

SC11/SC13 Parameters

AL

Bit 0-4

00000b = 0 wait states
00001b = 1 wait states
00010b = 2 wait states
00011b = 3 wait states
01000b = 5 wait states
01001b = 7 wait states
01010b = 9 wait states
01011b = 15 wait states
10000b = 24 wait states
10001b = 41 wait states
10010b = 74 wait states
10011b = 123 wait states
11000b = 157 wait states
11001b = 175 wait states
11010b = 201 wait states
11011b = 255 wait states

Bit 5-7

don't care

SC12/SC1x3 Parameters

AL

Bit 0-3

0000b = 0 wait states
0001b = 1 wait states
0010b = 2 wait states
0011b = 3 wait states
1000b = 5 wait states
1001b = 7 wait states
1010b = 9 wait states
1011b = 15 wait states

Bit 4-7

don't care

Return Value

none

SC12/SC1x3 Comments

Default for PCS0#-PCS3# are 15 wait states.  

SC11/SC13 Comments

Default for PCS0#-PCS3# are 41 wait states.  

Related Topics

Enable programmable chip selects

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.03	V1.00	V1.00	V0.90	n/a

SC11/SC13:

Set wait states for programmable chip selects PCS5# - PCS6#

SC1x3:

Set wait states for programmable chip selects PCS4# - PCS7#

Parameters

AH

Must be 0x8B.

SC1x3 Parameters

AL

Bit 0-4

00000b = 0 wait states
00001b = 1 wait states
00010b = 2 wait states
00011b = 3 wait states
01000b = 4 wait states
01001b = 5 wait states
01010b = 6 wait states
01011b = 7 wait states
10000b = 8 wait states
10001b = 9 wait states
10010b = 10 wait states
10011b = 11 wait states
11000b = 12 wait states
11001b = 13 wait states
11010b = 14 wait states
11011b = 15 wait states

Bit 5-7

don't care

SC11/SC13 Parameters

AL

Bit 0-4

00000b = 0 wait states
00001b = 1 wait states
00010b = 2 wait states
00011b = 3 wait states
01000b = 5 wait states
01001b = 7 wait states
01010b = 9 wait states
01011b = 15 wait states
10000b = 24 wait states
10001b = 41 wait states
10010b = 74 wait states
10011b = 123 wait states
11000b = 157 wait states
11001b = 175 wait states
11010b = 201 wait states
11011b = 255 wait states

Bit 5-7

don't care

Return Value

none

SC11/SC13 Comments

Default for PCS5# - PCS6# are 9 wait states.  

SC1x3 Comments

Default for PCS4# - PCS7# are 15 wait states.  

Related Topics

Enable programmable chip selects

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
n/a	V1.00	V1.00	V0.90	n/a

Set wait states for external memory chip select UCS#

Parameters

AH

Must be 0x8C.

AL

Bit 0-4

00000b = 0 wait states
00001b = 1 wait states
00010b = 2 wait states
00011b = 3 wait states
01000b = 4 wait states
01001b = 5 wait states
01010b = 6 wait states
01011b = 7 wait states
10000b = 8 wait states
10001b = 9 wait states
10010b = 10 wait states
10011b = 11 wait states
11000b = 12 wait states
11001b = 13 wait states
11010b = 14 wait states
11011b = 15 wait states

Bit 5-7

don't care

Return Value

none

Comments

Default for UCS# are 9 wait states.  

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
n/a	n/a	n/a	V0.90	n/a

Activate the bus signals ARDY, HOLD, WRL/WRH and A0/BHE.

Parameters

AH

Must be 0x8D.

BX

Signal Mask

Bit0=1: Enable Asynchronous Ready (ARDY)
Bit1=1: Enable HOLD
Bit2=1: Enable WRL/WRH
Bit3=1: Enable A0/BHE

Return Value

none

Comments

Used pins:

ARDY, HOLD

Excluded pins:

If ARDY: PIO6
If HOLD: PIO17
If WRL/WRH: A0/BHE
If A0/BHE: WRL/WRH

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
n/a	n/a	n/a	V1.07	n/a

Get the Function Pointers to Hardware API Functions, so that the functions can be called directly (without Software Interrupt).   This is much faster.

Parameters

AH

Must be 0x90.

ES:DI

Pointer to a HwApiFunctionStruct data structure which will be filled with vectors to @CHIP-RTOS Hardware API Functions.

Return Value

AX= -1 if size parameter was too large.   The size field of the structure will be set in this case to the number of supported vectors.

AX= 0 on success

Comments

Note that the size member of the HwApiFunctionStruct serves as both an input and output parameter.   The caller must set this value to the number of vectors to be filled into the data structure by this API call.   In the event that this value exceeds the number of vectors available, the AX value returned will be -1 and this API will set the size to 2, which is the number of vectors available by this API's current implementation.

In any case, the resulting count in size indicates the number of vectors output to the caller's HwApiFunctionStruct data structure at [ES:DI] by this API call.

typedef struct
{
   int size; // number of function entries
   unsigned  (huge *readPios)(void);
   void      (huge *writePios)(unsigned);
} HwApiFunctionStruct;

// Example for usage:

int main()
{
  HwApiFunctionStruct hwApi;
  unsigned            pios;

  [...]
  hwApi.size = 2;          // space for two functions in the struct
  pfe_get_hwapi_func_ptr(&hwApi);

  hwApi.writePios(0x55);   // write something to the pios
  pios = hwApi.readPios(); // read something from the pios
  [...]
}

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.03	V1.00	V1.00	n/a	n/a

Define the interrupt handler for the hardware interrupt 0

Parameters

AH

Must be 0x10

ES:DX

Pointer to your interrupt handler

Return Value

none

Comments

The interrupt handler should be defined as

void interrupt my_handler(void)

Interrupts are enabled upon entry into your routine.

There is no need to signal any end of interrupt.   This is handled by the system after your handler performs it's return.

The stack size must be at least 400 bytes.

Do not use any floating point arithmetic in your interrupt service routine.

This function is only for compatibility to older version of the hardware API. It is now deprecated.
Please use interrupt 0xA2 function 0x84 and interrupt 0xA1 function 0x84 instead.

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	n/a	n/a

Read from specified address.

Parameters

AH

Must be 0x80.

DI

Address

BX

wAND

CX

wXOR

SC1x Return Value

8 Bit data in AX, AX = (databus & wAND) ^ wXOR

SC1x3 Return Value

16 Bit data in AX, AX = (databus & wAND) ^ wXOR

Comments

& = bit wise AND
^ = bit wise XOR

The result is combined with wAND and wXOR parameters.   To read the data bus without change, set wAND=0xFFFF and wXOR=0x0000.

Related Topics

Block Read Data Bus

Write Data Bus

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	n/a

Write to specified address.

Parameters

AH

Must be 0x81.

DI

Address

BX

wAND

CX

wXOR

SC1x Parameters

DL

8 bit data

SC1x3 Parameters

DX

16 bit data

Return Value

none

Comments

& = bit wise AND
^ = bit wise XOR

The provided parameters are combined as follows to form the output byte value:

output value = (data & wAND) ^ wXOR

To write the value in DX to the address without modification, set wAND=0xFFFF and wXOR=0x0000.

Related Topics

Block Write Data Bus

Read Data Bus

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	n/a

Read the programmable I/O pins.

Parameters

AH

Must be 0x82.

SC1x Parameters

BX

wAND

CX

wXOR

SC1x3 Parameters

BX

wAND for PIOs 0-15

CX

wXOR for PIOs 0-15

SI

wAND for PIOs 16-24, 26-31

DI

wXOR for PIOs 16-24, 26-31

SC2x Parameters

BX

wAND for PIOs 0-2, 9-13

CX

wXOR for PIOs 0-2, 9-13

SI

wAND for PIOs 18-23, 27-28, 31

DI

wXOR for PIOs 18-23, 27-28, 31

SC1x Return Value

AX = (PIO[0..13] & wAND) ^ wXOR.

SC1x3 Return Value

AX = (PIO[0..15] & wAND) ^ wXOR
DX = (PIO[16..24, 26..31] & wAND) ^ wXOR.

SC2x Return Value

AX = (PIO[0..2, 9..13] & wAND) ^ wXOR
DX = (PIO[18..23, 27..28, 31] & wAND) ^ wXOR.

Comments

& = bit wise AND
^ = bit wise XOR

The result is combined with the wAND and wXOR parameters.   To read the PIO pins without modification, set wAND=0xFFFF and wXOR=0x0000.   To read only the input pins, set wAND = wPIO & wINPUTS.   The wPIO and wINPUTS values are return values from PFE function 0x82.

Related Topics

Read Specific I/O Pin

Write Programmable I/O Pins

PFE: Enable Programmable I/O Pins

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Write to the programmable I/O pins.

Parameters

AH

Must be 0x83.

SC1x Parameters

BX

wAND

CX

wXOR

DX

data applied to PIO[0..13]

where DX bit 0 maps to PIO[0]
and DX bit 13 maps to PIO[13]

SC1x3 Parameters

BX

wAND for PIO[0..15]

CX

wXOR for PIO[0..15]

DX

data applied to PIO[0..15]

where DX bit 0 maps to PIO[0]
and DX bit 15 maps to PIO[15]

SC2x Parameters

BX

wAND for PIO[0..2, 9..13]

CX

wXOR for PIO[0..2, 9..13]

DX

data applied to PIO[0..2, 9..13]

where DX bit 0 maps to PIO[0]
and DX bit 13 maps to PIO[13]

Return Value

none

Comments

& = bit wise AND
^ = bit wise XOR

Before the value is written, the value is combined with the wAND and wXOR parameters as:

PIO[] = (data & wAND) ^ wXOR

To write value in DX to the programmable I/O pins without change, set wAND=0xFFFF and wXOR=0x0000.

Only PIO pins that are defined as outputs can be written.

Related Topics

Write Specific I/O Pin

Read Programmable I/O Pins

PFE: Enable Programmable I/O Pins

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V1.07	V1.00

Install user interrupt service routine to be invoked by system interrupt handler.

Parameters

AH

Must be 0x84.

DH

Bit mask for the ISR type:

BIT0..6 must be 0
BIT7: 0=normal ISR, 1=RTX ISR (RTX ISR allow RTX Calls, e.g. wake a task), please notice the comment below!

CX

Number of interrupts generated before new user interrupt service routine is called.
CX = 0 disables the user ISR (same as a NULL in ES:BX).

ES:BX

far pointer to user interrupt service routine
    if pointer is NULL user ISR is disabled

SC1x Parameters

DL

HAL interrupt number from following list:

0 = INT0 (external)
1 = (*) Network controller (internal)
2 = INT2 (external)
3 = INT3 (external)
4 = INT4 (external) (no RTX ISR allowed)
5 = INT5 (external) / DMA Interrupt Channel 0 (if DMA is used)
6 = INT6 (external) / DMA Interrupt Channel 1 (if DMA is used)
7 = reserved
8 = Timer0 (internal)
9 = Timer1 (internal)
10 = (*) Timer 1ms (internal)
11 = (*) Serial port 0 (internal)
12 = (*) Serial port 1 (internal)
13 = (*) DMA Interrupt Channel 2 (internal, not on SC12)
14 = (*) DMA Interrupt Channel 3 (internal, not on SC12)
15 = NMI Powerfail Interrupt (internal/external)

(*) = used internally by @CHIP-RTOS, not available for user interrupt service functions

SC1x3 Parameters

DL

HAL interrupt number from following list:

0 = (*) Network controller 0 (internal)
1 = INT1 (external)
2 = SPI controller (internal)
3 = INT3 (external) / (*) USB controller (internal)
4 = (*) Serial port 2 (internal)
5 = DMA Interrupt Channel 0
6 = DMA Interrupt Channel 1
7 = INT5 (external) / (*) Serial port 3 (internal)
8 = Timer0 (internal)
9 = Timer1 (internal)
10 = (*) Timer 1ms (internal)
11 = (*) Serial port 0 (internal)
12 = (*) Serial port 1 (internal)
13 = DMA Interrupt Channel 2 (no RTX ISR allowed)
14 = DMA Interrupt Channel 3
15 = PFI Powerfail Interrupt (internal/external)
16 = (*) CAN0 controller (internal) / (*) CAN1 controller (internal)
17 = I2C controller (internal)
18 = Network controller 1 (internal)

(*) = used internally by @CHIP-RTOS, not available for user interrupt service functions

SC2x Parameters

DL

HAL interrupt number from following list:

0 = (*) Network controller 0 (internal)
1 = INT1 (external)
2 = SPI controller (internal)
3 = INT3 (external) / (*) USB controller (internal)
4 = (*) Serial port 2 (internal)
5 = (*) DMA Interrupt Channel 0
6 = (*) DMA Interrupt Channel 1
7 = INT5 (external) / (*) Serial port 3 (internal)
8 = Timer0 (internal)
9 = Timer1 (internal)
10 = (*) Timer 1ms (internal)
11 = (*) Serial port 0 (internal)
12 = (*) Serial port 1 (internal)
13 = (*) DMA Interrupt Channel 2
14 = (*) DMA Interrupt Channel 3
15 = PFI Powerfail Interrupt (internal/external)
16 = (*) CAN0 controller (internal) / (*) CAN1 controller (internal)
17 = I2C controller (internal)
18 = (*) Network controller 1 (internal)

(*) = used internally by @CHIP-RTOS, not available for user interrupt service functions

Return Value

Far pointer to old handler in ES:BX

Comments

The user-defined ISR is called from a system ISR with the interrupt identifier number in the BX CPU register, thus allowing for a single user ISR to handle multiple interrupt sources.   The user ISR can be declared in either of the following forms:

void huge My_ISR(void) ;     // More efficient form

void interrupt My_ISR(void) ;     // Tolerated form

The more efficient huge procedures are recommended.   For assembly language ISR implementations, a far RET is recommended and a IRET on exit is tolerated.   The user ISR function must preserve only the DS and BP registers, so there is no requirement for the full register save/restore provided by the interrupt declarations.

Any required EOI signal is issued by the system ISR which calls your user ISR function.  This EOI is issued after your function returns.

If you install a RTX ISR you can use the following RTX calls in your ISR:

RTX_RESTART_TASK
RTX_WAKEUP_TASK
RTX_SIGNAL_SEM
RTX_SIGNAL_EVENTS
RTX_SEND_MSG
RTX_START_TIMER
RTX_STOP_TIMER
RTX_REMOVE_TIMER

Important Notes:
A RTX ISR is slower than a normal ISR.  

SC1x Comments

RTX ISR are not recommended for INT5 or INT6 if DMA is used by the Fossil serial ports interface, because the slower RTX ISR could result in UART receiver character loss.  

If you are using a RTX ISR for timer0, timer1, INT5 or INT6 there must not exist a normal ISR on the system which enables the interrupts during its execution!

Do not install a RTX ISR for the powerfail interrupt!

Also important :   The NMI function of the multifunction pin 17 (RESET/NMI/LINK_LED) of the IPC@CHIP® SC11/SC12/SC13 is for power fail purposes only.   It is not possible to use NMI as a "normal" interrupt pin like INT0 for generating interrupts.   It can only be used as described in the IPC@CHIP® hardware documentation.

SC1x3 Comments

INT1 and network controller 1 share the same interrupt. Due to this fact, the installed user interrupt service routines for INT1 and network controller 1 must be of same type. If the network controller 1 is used both ISRs must be of type RTX ISR.

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Initialize the timer settings of timer0 or timer1.

Parameters

AH

Must be 0x85.

AL

Timer
    0=Timer0 / 1=Timer1

DX

Mode
    Bit 0: 0=run single time / 1=run continuous
    Bit 1: 0=disable timer interrupt / 1=enable timer interrupt
    Bit 2: 0=use internal clock / 1=use TMRIN pin as external clock
    Bit 3..15: not used

CX

Clock divider (maximum count value)

Return Value

none

Comments

The clock divider value serves as a comparator for the associated timer count.   The timer count is a 16 bit value that is incremented by the processor internal clock (see HAL function 0x8A) or can also be configured to increment based on the TMRIN0 or TMRIN1 external signals (see PFE function 0x85).   The TMROUT0 und TMROUT1 signals can be used to generate waveforms of various duty cycles.   The default is a 50% duty cycle waveform   (Change waveform with HAL function 0x8B).

Note that TMRIN pin and TMROUT pin can not be used at the same time.

When the timer is configured to run in single time mode, the timer clears the count and then halts on reaching the maximum count (clock divider value).

If the timer interrupt is enabled, the interrupt request is generated when the count equals the clock divider value.   Use HAL function 0x84 to install your interrupt service routine.

If "use internal clock" is selected the associated TMRIN pin serves as a gate.   A "high" on the TMRIN pin keeps the timer counting.   A "low" holds the timer value.

SC1x Comments

If the clock divider value is set to 0000h, the timer will count from 0000h to FFFFh (maximum divider).  When the timer reaches the clock divider value, it resets to 0 during the same clock cycle.   The timer count never dwells equals to the clock divider value (except for special case when divider value is set to 0000h).

SC1x3/SC2x Comments

When the timer reaches the clock divider value, it resets to 0 during the same clock cycle.   The timer count never dwells equals to the clock divider value.
If the clock divider value is set to 0000h, the timer will not count from 0000h to FFFFh like on SC12 and SC13.  

Related Topics

Initialize Timer Settings Ext

HAL Start Timer function

Read Timer Count

Write Timer Count

The timer output frequency is dependent on the internal processor clock.
For compatibility with future versions of @Chip, please use the HAL function 0x8A, "Get frequencies", to compute the correct clock divider value.

Available examples
    1. TimerIn example, timerin.c
    2. TimerOut example, timerout.c

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Enable the specified timer to count.

Parameters

AH

Must be 0x86.

AL

Timer
    0=Timer0 / 1=Timer1

Return Value

none

Related Topics

HAL Initialize Timer Settings

Stop Timer function

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Stop the specified timer's counting

Parameters

AH

Must be 0x87.

AL

Timer
    0=Timer0 / 1=Timer1

Return Value

none

Comments

The specified timer is disabled.

Related Topics

Start Timer function

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Read the timer count.

Parameters

AH

Must be 0x88.

AL

Timer
    0=Timer0 / 1=Timer1

Return Value

AX = Counter reading
DX = 1=MaxCount reached / 0=MaxCount not reached

Comments

AX contains the current count of the associated timer.   The count is incremented by the processor internal clock (see HAL function 0x8A), unless the timer is configured for external clocking (then it is clocked by the TMRIN0 and TMRIN1 signals).

Related Topics

HAL Initialize Timer Settings

Stop Timer function

Write Timer Count

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Preset the specified timer's count register to provided value.

Parameters

AH

Must be 0x89.

AL

Timer
    0=Timer0 / 1=Timer1

DX

Value to write to 16 bit counter

Return Value

none

Comments

The timer count can be written at any time, regardless of whether the corresponding timer is running.

Related Topics

HAL Initialize Timer Settings

Stop Timer function

Read Timer Count

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Get the system frequencies.

Parameters

AH

Must be 0x8A.

SC1x Parameters

AL

Which frequency to get:

0 = Return processor frequency
1 = Return maximum TMROUT square wave frequency
2 = Return maximum baud rate
3 = Return timer base freqeuncy / PWD timer frequency

SC1x3/SC2x Parameters

AL

Which frequency to get:

0 = Return processor frequency
1 = Return maximum TMROUT square wave frequency
2 = Return maximum baud rate
3 = Return timer base frequency

Return Value

DX:AX frequency [Hz]

Comments

Use the timer base frequency to compute the correct timer clock divider value, where:

Timer frequency = timer base frequency / clock divider

Use the maximum TMROUT square wave frequency to compute the correct timer clock divider value for the TMROUT, where:

TMROUT frequency = maximum TMROUT square wave frequency / clock divider

Use the maximum baud rate to compute the correct value for the processor specific baud rate initialize function (See Fossil Extended line control initialization function).

Baud rate = maximum baud rate / baud rate divider

Related Topics

HAL Initialize Timer Settings

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V1.05	V1.00

Set the duty cycle waveform of specified timer.

Parameters

AH

Must be 0x8B.

AL

Which Timer
    0=Timer0 / 1=Timer 1

DX

Mode
    0=disable duty cycle / 1=enable duty cycle

CX

Alternate clock divider (if DX = 1)

Return Value

none

Comments

Use this function to modify the timer waveform behavior.   For example a 50% duty cycle waveform can be generated by specifying here an alternate clock divider value in CX that is the same value as was used for the main clock divider value set in the Timer Initialization function call.

Please note that the timer frequency will change if you use this function.   If you disable the duty cycle, the timer output will no longer generate a rectangle signal.   When duty cycle mode is disabled, the TMROUT pin switches low for only one clock cycle after the maximum count is reached.   If you want an alternate duty cycle waveform, compute it with the following formula:

Output frequency = Maximum TMROUT square wave frequency * 2
            / (divider high level + divider low level)

The divider high level is the divider set by the Timer Initialization function.   The divider low level is the alternate clock divider passed to this function in the CX register.

Related Topics

HAL Initialize Timer Settings

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Read specified programmable I/O pin.

Parameters

AH

Must be 0x8C.

SC1x Parameters

AL

IPC@CHIP® PIO No [0..13]

SC1x3 Parameters

AL

IPC@CHIP® PIO No [0..24, 26..31].

SC2x Parameters

AL

IPC@CHIP® PIO No [0..2, 9..13, 18..23, 27..28, 31].

Return Value

AX=0 PIO pin is low, AX!=0 PIO pin is high

Related Topics

Write to Specific I/O Pin

Read Programmable I/O Pins

PFE: Enable Programmable I/O Pins

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Write to a specified programmable I/O pin.   Only PIO pins that are defined as outputs can be written.

Parameters

AH

Must be 0x8D.

DX

DX = 0 ==> set PIO to low
DX non-zero ==> set PIO to high

SC1x Parameters

AL

IPC@CHIP® PIO No [0..13]

SC1x3 Parameters

AL

IPC@CHIP® PIO No [0..24, 26..31]

SC2x Parameters

AL

IPC@CHIP® PIO No [0..2, 9..13, 18..23, 27..28, 31]

Return Value

none

Related Topics

Read Specific I/O Pin

Write Programmable I/O Pins

PFE: Enable Programmable I/O Pins

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Give End-Of-Interrupt for INT0-INT4

Parameters

AH

Must be 0x8E.

AL

Type (0=INT0 ... 4=INT4)

Return Value

none

Comments

When installing a interrupt service routine through HW API, it's not
necessary to call this function, because the HW API does it for you.
This function is provided for writing your own interrupt service routines without
the HAL function Install Interrupt Service Routine.

This function is especially needed for generating an EOI for INT0 when using cascaded
mode of the interrupt controller with INT0/INTA .

Related Topics

Enable INT0/INTA cascade mode

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.02	V1.00	V1.00	n/a	n/a

Some more useful timer settings (extends the Initialize Timer Settings function)

Parameters

AH

Must be 0x8F.

AL

Timer
    0=Timer0 / 1=Timer1

DX

Mode
    Bit 0..2: must be 0
    Bit 3: 0=disable prescale t2 / 1=enable prescale t2
    Bit 4: 0=disable retrigger / 1=enable retrigger
    Bit 5..15: must be 0

Return Value

none

Comments

The Initialize Timer Settings function must be called prior to this function!

Prescale T2:

If the Prescale feature is enabled, the timer (specified in AL) will use Timer2 output for its timer base (clock input). If the RTI rate is not changed by the user it will provide a 1000 Hz timer clock rate.   (Timer2 is used internally by the @CHIP-RTOS as the Real-Time Interrupt (RTI), which defaults to a one millisecond interval timer.)   If this Prescale bit is disabled, the timer base will instead be the frequency reported by the Get Frequencies API function.

SC1x Comments

Retrigger:

If the retrigger setting is enabled, a 0 to 1 edge transition on TMRIN0 (or TMRIN1) resets the timer count.   When retrigger is disabled (DX bit 4 set to 0), a High input on TMRIN0 (or TMRIN1) enables counting and a Low input holds the timer value.

SC1x3/SC2x Comments

Retrigger:

If the retrigger setting is enabled, a 0 to 1 edge transition on TMRIN0 (or TMRIN1) resets the timer count. If the input remains High, the timer starts counting on the following clock transitions. If the input goes again Low, the timer stops counting.   When retrigger is disabled (DX bit 4 set to 0), a High input on TMRIN0 (or TMRIN1) enables counting and a Low input holds the timer value.

Related Topics

Initialize Timer Settings

HAL Start Timer function

Read Timer Count

Write Timer Count

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.10	V1.00	V1.00	V0.90	V1.00

Get or set the watchdog mode.

Parameters

AH

Must be 0x90.

AL

Mode
    0 = only get mode
    2 = Watchdog will be triggered by user program
    3 = Watchdog will be triggered by @CHIP-RTOS (default)

Return Value

AX=mode

SC1x Comments

The watchdog timeout period is 800 ms.

If you select the User Program mode, you must call the HAL Refresh Watchdog function 0x91 at least every 800 ms to prevent the watchdog from resetting the system.   In @CHIP-RTOS mode, the @CHIP-RTOS performs the watchdog strobing provided that the system's timer interrupt is allowed to execute.   Beware that excessive interrupt masking periods can lead to system resets.

SC1x3/SC2x Comments

The watchdog timeout period is 699 ms.

If you select the User Program mode, you must call the HAL Refresh Watchdog function 0x91 at least every 699 ms to prevent the watchdog from resetting the system.   In @CHIP-RTOS mode, the @CHIP-RTOS performs the watchdog strobing provided that the system's timer interrupt is allowed to execute.   Beware that excessive interrupt masking periods can lead to system resets.

Related Topics

Refresh Watchdog Function

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Strobe the hardware watchdog to reset its timeout period.

Parameters

AH

Must be 0x91.

Return Value

none

SC1x Comments

If the watchdog is in User Program mode, this function must be called at least every 800 ms to prevent a CPU reset due to watchdog timeout.

SC1x3/SC2x Comments

If the watchdog is in User Program mode, this function must be called at least every 699 ms to prevent a CPU reset due to watchdog timeout.

Related Topics

Get/Set Watchdog Mode

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Mask or unmask an external Interrupt Request

Parameters

AH

Must be 0x92.

AL

1=Mask, 0=Unmask

SC1x Parameters

DX

HAL interrupt number from following list:

0 = INT0 (external)
1 = Network controller (internal)
2 = INT2 (external)
3 = INT3 (external)
4 = INT4 (external)
5 = INT5 (external) / DMA Interrupt Channel 0 (if DMA is used)
6 = INT6 (external) / DMA Interrupt Channel 1 (if DMA is used)
7 = reserved
8 = Timer0 (internal)
9 = Timer1 (internal)
10 = Timer 1ms (internal)
11 = Serial port 0 (internal)
12 = Serial port 1 (internal)
13 = DMA Interrupt Channel 2 (internal, not on SC12)
14 = DMA Interrupt Channel 3 (internal, not on SC12)
15 = NMI (Not maskable!)

SC1x3/SC2x Parameters

DX

HAL interrupt number from following list:

0 = Network controller 0 (internal)
1 = INT1 (external) / Network controller 1 (internal)
2 = SPI controller (internal) / I2C controller (internal)
3 = INT3 (external) / USB controller (internal)
4 = Serial port 2 (internal)
5 = DMA Interrupt Channel 0
6 = DMA Interrupt Channel 1
7 = INT5 (external) / Serial port 3 (internal)
8 = Timer0 (internal)
9 = Timer1 (internal)
10 = Timer 1ms (internal)
11 = Serial port 0 (internal)
12 = Serial port 1 (internal)
13 = DMA Interrupt Channel 2
14 = DMA Interrupt Channel 3
15 = NMI (Not maskable)
16 = CAN0 controller (internal) / CAN1 controller (internal)

Return Value

none

Comments

CAUTION:

Masking any of the three timer interrupts will suspend the @CHIP-RTOS 1000 Hz real-time interrupt, essential for system operation.   Consequently this mask period should be very brief, if used at all.

SC1x Comments

Some interrupts share the same mask bit.   If you mask one of them, the other interrupts which are assigned to the same bit are also masked.   Here are the groups which are masked together:

Timer0, Timer1, Timer 1ms
DMA0, INT5
DMA1, INT6

SC1x3/SC2x Comments

Some interrupts share the same mask bit.   If you mask one of them, the other interrupts which are assigned to the same bit are also masked.   Here are the groups which are masked together:

Timer0, Timer1, Timer 1ms
INT1 / Network controller 1
SPI controller / I2C controller
INT3 / USB controller
INT5 / Serial port 2
CAN0 controller / CAN1 controller

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.10	V1.00	V1.00	V0.90	V1.00

Write to the programmable I/O pins (PIOs 16-31).

Parameters

AH

Must be 0x93.

SC1x3 Parameters

DX

data applied to PIO[16..24, 26..31]

where DX bit 0 maps to PIO[16]
and DX bit 15 maps to PIO[31]

BX

wAND for PIO[16..24, 26..31]

CX

wXOR for PIO[16..24, 26..31]

SC2x Parameters

DX

data applied to PIO[18..23, 27..28, 31]

where DX bit 2 maps to PIO[18]
and DX bit 15 maps to PIO[31]

BX

wAND for PIO[18..23, 27..28, 31]

CX

wXOR for PIO[18..23, 27..28, 31]

Return Value

none

Comments

& = bit wise AND
^ = bit wise XOR

Before the value is written, the value is combined with the wAND and wXOR parameters as:

PIO[] = (data & wAND) ^ wXOR

To write value in DX to the programmable I/O pins without change, set wAND=0xFFFF and wXOR=0x0000.

Only PIO pins that are defined as outputs can be written.

Related Topics

Write Specific I/O Pin

Read Programmable I/O Pins

PFE: Enable Programmable I/O Pins

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
n/a	n/a	n/a	V1.07	V1.00

Read block of bytes from data bus into provided buffer.

Parameters

AH

Must be 0xA0.

DI

First address

SI

Second address

ES:BX

Pointer to buffer

CX

Number of bytes to read into buffer

Return Value

none

Comments

IF SI != DI, this function will alternate reads between the two addresses until CX bytes are read, starting at first address.   Set SI == DI if you want to read from only a single address.

Related Topics

Block Write Data Bus

Read Data Bus

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	n/a	n/a

Output byte stream from buffer to specified address or addresses.

Parameters

AH

Must be 0xA1.

DI

First address

SI

Second address

ES:BX

Pointer to buffer

CX

Number of bytes in buffer to output

Return Value

none

Comments

IF SI != DI, this function will alternate between writes to first and second address.   Set SI == DI if you want all data written to a single address.

Related Topics

Block Read Data Bus

Write Data Bus

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	n/a	n/a

Starts the DMA mode.   After calling this function, the DMA transfer will be started when the external DRQ pins is activated.

Parameters

AH

Must be 0xB0

CX

Number of bytes which has to be transferred

DX

Control Register:
    Bit 0: 1=Priority for the channel / 0=Priority for the other channel
    Bit 1: 1=Source synchronized / 0=No source synchronization
    Bit 2: 1=Destination synchronized / 0=No destination synchronization
    Bit 3: 1=Use interrupt at end of transfer / 0=do not use an interrupt
    Bit 4: must be set to '1'
    Bit 5: 1=Source address increment / 0=No increment of source address
    Bit 6: 1=Source address decrement / 0=No decrement of source Address
    Bit 7: 1=Source is in memory space / 0=Source is in IO space
    Bit 8: 1=Destination address increment / 0=No increment of destination address
    Bit 9: 1=Destination address decrement / 0=No decrement of destination address
    Bit 10: 1=Destination is in memory space / 0=Destination is in IO space
    Bit 11: 1=Word Transfer / 0=Byte Transfer
Bit1 and Bit2 can't be set at the same time.

SC1x Parameters

AL

DMA channel:
0 = DRQ0
1 = DRQ1

BX:SI

Pointer to unsigned long (20-Bit physical) source address

ES:DI

Pointer to unsigned long (20-Bit physical) destination address

SC1x3 Parameters

AL

DMA channel:
0 = DRQ0
1 = DRQ1
2 = DRQ2
3 = DRQ3

BX:SI

Pointer to unsigned long (24-Bit physical) source address

ES:DI

Pointer to unsigned long (24-Bit physical) destination address

Return Value

Success: AX = 0
AX = -1 Invalid DMA channel
AX = -2 DMA channel used for serial interface

Comments

This function starts a DMA transfer.   After calling this function the DMA controller is ready for transfer.   Once the DRQ pin is activated the DMA transfer will be started.   The number of bytes which will be transferred has to be specified in the CX register.   Before calling this function you have to enable the DRQ pin for this channel.

Related Topics

Enable external DRQ Pin

HAL Stop DMA Transfer

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.02	V1.00	V1.00	V0.90	n/a

Disables the DMA controller.   A running DMA transfer will be halted.

Parameters

AH

Must be 0xB1

SC1x Parameters

AL

DMA channel:
0 = DRQ0
1 = DRQ1

SC1x3 Parameters

AL

DMA channel:
0 = DRQ0
1 = DRQ1
2 = DRQ2
3 = DRQ3

Return Value

Success: AX = 0
AX = -1 Invalid DMA channel
AX = -2 DMA channel used for serial interface

Comments

Stops a DMA transfer (disables the DMA controller).   The transfer could be continued by reading the current DMA values (using function Get DMA Info) and starting the DMA Transfer again with the read values (using function Start DMA Mode)

Related Topics

Start DMA Transfer

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.02	V1.00	V1.00	V0.90	n/a

Get the state of the DMA channel.

Parameters

AH

Must be 0xB2

SC1x Parameters

AL

DMA channel:
0 = DRQ0
1 = DRQ1

BX:SI

Output Parameter:   Pointer to unsigned long where this function will write the (20-Bit physical) source address

ES:DI

Output Parameter:   Pointer to unsigned long where this function will write the (20-Bit physical) destination address

SC1x3 Parameters

AL

DMA channel:
0 = DRQ0
1 = DRQ1
2 = DRQ2
3 = DRQ3

BX:SI

Output Parameter:   Pointer to unsigned long where this function will write the (24-Bit physical) source address

ES:DI

Output Parameter:   Pointer to unsigned long where this function will write the (24-Bit physical) destination address

Return Value

AX = 0 DMA channel disabled
AX = 1 DMA channel (user mode) enabled for transfer
AX = -1 Invalid DMA channel
AX = -2 DMA channel used for serial interface
CX = DMA counter (bytes which have yet to be transferred)
DX = Control Register:     Bit 0: 1=Priority for the channel / 0=Priority for the other channel
    Bit 1: 1=Source synchronized / 0=No source synchronization
    Bit 2: 1=Destination synchronized / 0=No destination synchronization
    Bit 3: 1=Use interrupt at end of transfer / 0=do not use an interrupt
    Bit 4: must be set to '1'
    Bit 5: 1=Source address increment / 0=No increment of source address
    Bit 6: 1=Source address decrement / 0=No decrement of source Address
    Bit 7: 1=Source is in memory space / 0=Source is in IO space
    Bit 8: 1=Destination address increment / 0=No increment of destination address
    Bit 9: 1=Destination address decrement / 0=No decrement of destination address
    Bit 10: 1=Destination is in memory space / 0=Destination is in IO space
    Bit 11: 1=Word Transfer / 0=Byte Transfer

[BX:SI] = contains unsigned long (physical) DMA source address
[ES:DI] = contains unsigned long (physical) DMA destination address

Comments

This function returns the status of the DMA channel in AX.

Related Topics

Start DMA Transfer

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.02	V1.00	V1.00	V0.90	n/a

Initialize/Restore non-volatile data.   Tell the @CHIP-RTOS where your variables are located, which should be saved and reload their saved values, if available.

SC1x:

The non-volatile (remanent) data is stored in A:\rema.bin file.

SC1x3/SC2x:

The non-volatile (remanent) data is stored in a reserved flash memory area. The maximum size is approx. 8 KB.

Parameters

AH

Must be 0xC0

ES:BX

Pointer to a _REMOP structure:

struct _REMOP
{
    unsigned entries; // Number of entries in struct
                      // REMOP_ENTRY x[].
    unsigned segment; // Common segment address

    struct REMOP_ENTRY
    {
        unsigned offs;      // Address offset
        unsigned size;      // Number of bytes
        unsigned maxsize;   // Obsolete, set to 0
        unsigned elemsize;  // Number of bytes per data
                            // element
        unsigned distance;  // Distance to next data element
                            // (must be >= elemsize).
    }x[MAX_RETENTIVE_AREAS];
};

Return Value

Success: AX = 0
Failure: AX < 0, Error

Comments

Call this function at the beginning of your program.

The _REMOP structure reference by ES:BX must be static.   (This function does not make a copy of the structure's content.)

The number of entries in the x array of REMOP_ENTRY data structures can be defined by the user.   This number must be specified in the entries field of the _REMOP data structure.

All data saved / restored must reside in the same segment, specified by the segment field in _REMOP.   The individual data item locations in this segment are then listed in the offs fields of the REMOP_ENTRY structure array.

Related Topics

Save Non-Volatile Data

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

This function saves your non-volatile data listed in the _REMOP structure registered with HAL function 0xC0.

SC1x:

The data is stored in A:\rema.bin file.

SC1x3/SC2x:

The data is stored in a reserved flash memory area.

Parameters

AH

Must be 0xC1

Return Value

none

Comments

Call this function on exit from your program and in your powerfail (NMI, Non-Maskable Interrupt) handler.   Your hardware around the IPC@CHIP® must support the Pfail signal, so that the IPC@CHIP® can generate an powerfail interrupt sufficiently in advance of power loss to the CPU.

SC12 Comments

Reminder : The SC12 evalution board DK40 does not support the Pfail signal.

Related Topics

Initialize/Restore Non-Volatile Data

Install Interrupt Service Routine

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Check cause of most recent reboot.

Parameters

AH

Must be 0xC2

Return Value

AX = reason:

0 = UNKNOWN
3 = WATCHDOG
4 = POWER FAIL

Comments

This function only returns valid results if save data function (0xC1) was called from the user's Non-Maskable Interrupt (NMI) callback or at program exit and the init/restore function (0xC0) was called following the reboot.

Related Topics

Initialize/Restore Non-Volatile Data

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.00	V1.00	V1.00	V0.90	V1.00

Install a callback for the event "Powerfail is Done".   The callback is executed after all Powerfail actions are finished.   This means that the user non-volatile data has been written and the file sytem closed.

The user can toggle a PIO inside this callback and measure the time from Powerfail (PFI/NMI) to this event.

The time to close the file system depends on the number of open files and on which drive these files are located (speed of the drive).

Parameters

AH

Must be 0xC3

ES:DI

Pointer to callback function which should be of type:

typedef void huge (far *InterruptHandler)(void);

Return Value

none

Related Topics

Initialize/Restore Non-Volatile Data

Supported since or modified in @CHIP-RTOS version

SC12	SC13	SC11	SC1x3	SC2x
V1.21	V1.21	V1.21	V1.10	V1.00